UCSC-SOE-11-08: RAD-FETCH: Modeling Prefetching for Hard Real-Time Tasks

Roberto Pineiro, Kleoni Ioannidou, Scott A. Brandt, Carlos Maltzahn
02/28/2011 09:00 AM
Computer Science
Real–time systems and applications are becoming increasingly complex and larger, often requiring to process more data that what could be fitted in main memory. The management of the individual tasks is well-understood, but the interaction of communicating tasks with different timing characteristics is less well-understood. We discuss how to model prefetching across a series of real–time tasks/components communicating flows via reserved memory buffers (possibly interconnected via a real–time network) and present RAD– FETCH, a model for characterizing and managing these interactions. We provide proofs demonstrating the correctness RAD–FETCH, allowing system designers to determine the amount of memory required and latency bounds based upon the characteristics of the interacting real–time tasks and of the system as a whole.