UCSC-CRL-92-02: EARLY SYSTEM ANALYSIS OF CACHE PERFORMANCE FOR RISC SYSTEMS: MCM DESIGN TRADE-OFFS

03/01/1992 09:00 AM
Computer Engineering
This report presents a prototype early analysis tool for exploring trade-offs in cache architecture and packaging and inter- connection (P/I) technology for RISC microprocessor based systems. We define early analysis as the evaluation of system trade-offs, including implementation technology effects, at pre-netlist phases of development. Prior work in cache performance estimation and P/I modeling are combined and extended to be more specific to RISC systems. After describing the model, several case studies are presented. Although limited by the accuracy of the first- order model as well as by assumptions and estimations regarding input data, these studies indicate general trends and quantify several important trade-offs for multi-chip model systems. MCM characteristics favor larger off-chip caches, with improved performance as well as yield advantages. When combined with flip-chip mounting, MCM technology also permits cache system architectural changes which can significantly improve perfor- mance. The prototype is not intended as a design tool, but rather to demonstrate the utility and importance of an interactive early analysis tool, combining architecture and implementation technology issues. Suggestions for future tool development are made.

UCSC-CRL-92-02