12/01/1990 09:00 AM
Computer Engineering
Array multipliers are well suited for VLSI implementation because of their regular structure and relative ease of test. Previous research has provided test sets that detect all single faulty cells in array multipliers. We provide tests that detect all multiple faulty cells in the two-dimensional array of full-adders in the multiplier with a test set whose length is proportional to the square root of the number of cells in the multiplier array. We show an Omega(n / log n) lower bound on the number of tests required to detect all multiple faulty cells in the full adder array of an n X n multiplier.
